1. Field of the Invention
The present invention involves a method of fabricating subunits having precision butt edge surfaces and particularly to a method of forming an ink jet printhead from a linear array of butted subunits, each subunit being manufactured with precision butt edge surfaces formed by dicing, preferably with a resinoid blade.
2. Description of Related Art
Thermal ink jet printing systems use thermal energy selectively produced by resistors located in capillary filled ink channels near channel terminating nozzles or orifices to vaporize momentarily the ink and form bubbles on demand. Each temporary bubble expels an ink droplet and propels it towards a recording medium. The printing system may be incorporated in either a carriage type printer or a pagewidth type printer. The carriage type printer generally has a relatively small printhead, containing the ink channels and nozzles. The printhead is usually sealingly attached to a disposable ink supply cartridge and the combined printhead and cartridge assembly is reciprocated to print one swath of information at a time on a stationarily held recording medium, such as paper. After the swath is printed, the paper is stepped a distance equal to the height of the printed swath, so that the next printed swath will be contiguous therewith. The procedure is repeated until the entire page is printed. For an example of a cartridge type printer, refer to U.S. Pat. No. 4,571,599 to Rezanka. In contrast, the pagewidth printer has a stationary printhead having a length equal to or greater than the width of the paper. The paper is continually moved past the pagewidth printhead in a direction normal to the printhead length and at a constant speed during the printing process. Refer to U.S. Pat. No. 4,463,359 to Ayata et al for an example of pagewidth printing and especially FIGS. 17 and 20 therein.
U.S. Pat. No. 4,463,359 mentioned above discloses a printhead having one or more ink filled channels which are replenished by capillary action. A meniscus is formed at each nozzle to prevent ink from weeping therefrom. A resistor or heater is located in each channel upstream from the nozzles. Current pulses representative of data signals are applied to the resistors to momentarily vaporize the ink in contact therewith and form a bubble for each current pulse. Ink droplets are expelled from each nozzle by the growth of the bubbles which causes a quantity of ink to bulge from the nozzle and break off into a droplet at the beginning of the bubble collapse. The current pulses are shaped to prevent the meniscus from breaking up and receding too far into the channels, after each droplet is expelled. Various embodiments of linear arrays of thermal ink jet devices are shown, such as those having staggered linear arrays attached to the top and bottom of a heat sinking substrate for the purpose of obtaining a pagewidth printhead. Such arrangements may also be used for different colored inks to enable multi-colored printing.
U.S. Pat. No. 4,612,554 to Poleshuk discloses an ink jet printhead composed of two parts, each having a set of parallel V-grooves anisotropically etched therein. The lands between the grooves each contain a heating element and its associated addressing electrodes. The grooved parts permit face-to-face mating, so that they are automatically self-aligned by the intermeshing of the lands containing the heating elements and electrodes of one part with the grooves of the other parts. A pagewidth printhead is produced by offsetting the first two mated parts, so that subsequently added parts abut each other and yet continue to be self-aligned.
U.S. Pat. No. 4,601,777 to Hawkins et al and U.S. Pat. No. 4,774,530 to Hawkins (the disclosures of which are herein incorporated by reference) disclose "side shooter" configurations for a thermal ink jet printhead and several fabricating processes therefor. Each printhead is composed of two parts aligned and bonded together. One part is a substantially flat substrate which contains on the surface thereof a linear array of heating elements and addressing electrodes, and a second part is a substrate having at least one recess anisotropically etched therein to serve as an ink supply manifold when the two parts are bonded together. A linear array of parallel grooves also are formed in the second part, so that one end of the grooves communicates with the manifold recess and the other ends are open for use as ink droplet expelling nozzles. Many printheads can be made simultaneously by producing a plurality of sets of heating arrays with their addressing electrodes on a silicon wafer and by placing alignment marks thereon at predetermined locations. A corresponding plurality of sets of channels and associated manifolds are produced in a second silicon wafer. In one embodiment, alignment openings are etched in the second silicon wafer at predetermined locations. The two wafers are aligned via the alignment openings and alignment marks, then bonded together and diced into many separate printheads.
U.S. Pat. No. 4,789,425 to Drake et al. (the disclosure of which is herein incorporated by reference), discloses a thermal ink jet printhead of the type which expels droplets on demand towards a recording medium from nozzles located above and generally parallel with the bubble generating heating elements contained therein. The droplets are propelled from nozzles located in the printhead roof along trajectories that are perpendicular to the heating element surfaces. Such a configuration is sometimes referred to as a "roofshooter". Each printhead comprises a silicon heater plate and a fluid directing structural member. The heater plate has a linear array of heating elements, associated addressing elements, and an elongated ink fill hole parallel to and adjacent the heating element array. A structural member contains at least one recessed cavity, a plurality of nozzles, and a plurality of parallel walls within the recessed cavity which define individual ink channels for directing ink to the nozzles. The recessed cavity and fill hole are in communication with each other and form the ink reservoir within the printhead. The ink holding capacity of the fill hole is larger than that of the recessed cavity. The fill hole is precisely formed and positioned within the heater plate by anisotropic etching. The structural member may be fabricated either from two layers of photoresist, a two-stage flat nickel electroform, or a single photoresist layer and a single stage flat nickel electroform.
Drop-on-demand thermal ink jet printheads discussed in the above patents are fabricated by using silicon wafers and processing technology to make multiple small heater plates and channel plates. This works extremely well for small printheads. However, for large array or pagewidth printheads, a monolithic array of ink channels or heater elements cannot be practically fabricated in a single wafer since the maximum commercial wafer size is six inches. Even if ten inch wafers were commercially available, it is not clear that a monolithic channel or heater element array would be very feasible. This is because only one defective channel or heater element out of 2,550 would render the entire channel or heater element plate useless. This yield problem is aggravated by the fact that the larger the silicon ingot diameter, the more difficult it is to make it defect-free. Also, relatively few 81/2 inch channel or heater plate arrays could be fabricated in a ten inch wafer. Most of the wafer would be thrown away, resulting in very high fabrication costs.
The fabrication approaches for making either large array or pagewidth thermal ink jet printheads can be divided into basically two broad categories; namely, monolithic approaches in which one or both of the printhead components (heater substrate and channel plate substrate) are a single large array or pagewidth size, or sub-unit approaches in which smaller sub-units are combined to form the large array or pagewidth print bar. For an example of the sub-unit approach, refer to the abovementioned U.S. Pat. No. 4,612,554 to Poleshuk, and in particular to FIG. 7 thereof. The sub-unit approach may give a much higher yield of usable subunits, if they can be formed with butt edges that are precisely aligned with respect to each other when butting one subunit against an adjacent subunit. The alignment problems for these separate units presents quite a formidable task, the prior art solution of which makes this type of large array very expensive.
One previous technique for forming butt edges, shown in FIGS. 1A-1B, involves orientation dependent etching a groove 10 on one surface of the wafer, placing a dice cut 11 in the opposite surface of the wafer and applying a force F to fracture break the wafer along line 12 into subunits to produce butt edges 13. Adjacent subunits are then butted together at the butt edges 13 (FIG. 1B). Disadvantages of this technique are: the fracture edges can produce cracked passivation up to 50 micrometers away, the butt edges 13 are razor edges which are easily damaged, and any difference in chip thickness between two subunits results in a slight lateral misalignment in addition to the height misalignment since the butting surfaces are at an angle to each other. This lateral shift is due to the angle of the (111) etched surfaces in silicon wafer subunits.
Another previous method, illustrated in FIGS. 2A and 2B, which requires only one through etch, involves making at least one through etch 20 on one surface of the wafer to define a first butt edge 21 and dividing the wafer into two subunits S.sub.1, S.sub.2 forming a trough 22 on the other surface of the wafer, and then making a dice cut 23 through the trough 22 to form a second butt edge 24. The first butt edge 21 of each subunit is butted against the second butt edge 24 of an adjacent subunit (FIG. 2B) to form the array. This method reduces the amount of etch time required and also reduces the butt edge area. This method also is susceptable to a lateral displacement of 0.7.DELTA.h due to differences in adjacent chip height .DELTA.h.
U.S. Pat. No. 4,814,296 to Jedlicka et al discloses a process for forming individual dies having faces that allow the dies to be assembled against other like dies to form one and/or two dimensional scanning arrays. The active side of a wafer is etched to form small V-shaped grooves defining the die faces, relatively wide grooves are cut in the inactive side of the wafer opposite each V-shape groove, and the wafer is cut by sawing along the V-shape grooves. The saw is located so that the side of the saw blade facing the die is aligned with the bottom of the V-shape groove so that there is retained intact one side of the V-shape groove to intercept and prevent cracks and chipping caused by sawing from damaging the die active surface and any circuits thereon. The process of Jedlicka et al does not make use of a resinoid blade for cutting through the upper surface of the wafer and consequently requires a V-shape groove to be formed in the upper surface to prevent cracks and chipping from damaging the active surface of the wafer and any circuits thereon. The process of Jedlicka et al also requires a portion of the wafer between adjacent subunits to be scrapped and thus does not optimize silicon real estate.
U.S. Pat. No. 4,786,357 to Campanelli et al discloses a method of fabricating a plurality of printheads for an ink jet printing device. The printheads are fabricated from two substrates, at least one of which is a (100) silicon wafer. A plurality of sets of heating element arrays are formed on one substrate, together with addressing electrodes for each heating element. A thick film insulative layer is placed over the heating element and addressing electrodes. This thick film is patterned to remove a portion thereof from over the individual heating elements, placing them each in a recess, and the terminal end portions of the electrodes including new contact pads therefor. A plurality of ink supplying manifold recesses are anisotropically etched in a silicon wafer and a plurality of sets of channel grooves are formed, each set of which communicate with an associated manifold. The silicon wafer and heating element substrates are aligned and bonded together, so that each channel groove contains a heating element. The individual printheads are formed by first removing unwanted silicon above each set of end portions of electrodes by a dicing operation and then dicing the heating element substrate to obtain the individual printheads. The method of Campanelli et al does not use a resinoid dicing blade and does not form a groove on a back side of either the heating element substrate or the silicon wafer substrate. Although Campanelli et al discloses a prior art method of dicing the silicon wafer by forming a groove on a lower surface of a silicon wafer having multiple channel subunits thereon, the cutting is not performed with a resinoid cutting blade and neither surface of the silicon wafer contains a circuit. Thus, Campanelli et al does not recognize the problems solved by the present invention let alone disclose or suggest the present invention.
U.S. Pat. No. 4,237,600 to Rosen et al. discloses a method for batch fabricating stacked semi-conductor devices wherein the stack consists of two diodes. Rosen et al. stack two silicon wafers on top of each other with metalized surfaces of each wafer abutting one another, etch through upper and lower surfaces of this conjoined structure to form upper and lower grooves and then cut through the upper and lower grooves to form a plurality of stacked semi-conductor diodes. Rosen et al. does not butt adjacent diodes against one another, does not form pagewidth printheads or use a resinoid blade for cutting.
U.S. Pat. No. 3,895,429 to Huang et al. discloses a method of making a semi-conductor device including the steps of forming a groove in a lower surface of a wafer, filling that groove in with a removable filling material and separating the wafer into subunits by cutting through the upper surface of the wafer above the groove. The step of cutting is performed while the removable filling material is still located within the groove. Huang et al. does not use a resinoid blade for cutting. Huang et al. does not recognize the advantage of using the lower surface groove for providing a clearance for the cutting blade since that groove is filled in during the cutting procedure.
U.S. Pat. No. 3,859,127 to Lehner discloses a method of producing mesa type semi-conductor devices having passivated mesa junctions. P and/or N type semi-conductor material is deposited on a silicon wafer, grooves are etched through the upper layers of silicon material, the substrate including the semi-conductor devices is passed through a chamber wherein a passivation layer is applied over the semi-conductor material and the substrate is cut at the location of the grooves to form a plurality of semi-conductor devices. The method of Lehner forms grooves on the upper surface of the substrate and does not disclose whether the cutting takes place through the groove or from the opposite surface of the wafer. Lehner does not teach or suggest the present invention or any of the benefits obtained thereby.
U.S. Pat. No. 3,913,217 to Misawa et al. discloses a method of producing semiconductor devices wherein grooves are etched through the upper surface of the wafer to define multiple semiconductor devices from a single wafer. A backing member is used to support the individual semiconductor devices after they are formed from the single wafer. Misawa et al. does not place the groove in the lower surface of the wafer and thus does not provide a clearance for a cutting blade. Although the wafer is additionally cut within the groove to separate into individual semi-conductor devices, it is not disclosed from which side this cut is made. Additionally a resinoid blade is not used.
U.S. Pat. No. 4,604,161 to Araghi discloses the previously discussed method in FIGS. 1A and 1B of forming butt edges on silicon wafer subunits by forming a groove in a lower surface of the wafer, etching a V-shape groove in an upper surface of the wafer, supporting the wafer on a fulcrum and causing the wafer to fracture into multiple pieces by applying a force to the upper surface thereof.
U.S. Pat. No. 4,237,601 to Woolhouse et al. discloses a method of forming multiple diode bars from a single wafer wherein grooves are formed on the lower surface of the wafer and the wafer is separated into multiple diodes by mechanical cleaving. The cleaving can be done by applying a force to the wafer such as by rolling the wafer over a small surface or by cutting through the groove from the groove side with a blade. Woolhouse et al. does not use a resinoid blade.
U.S. Pat. No. 3,706,129 to McCann discloses a process for forming semiconductive units wherein a set of parallel grooves are formed on one surface of a wafer, a second set of parallel grooves are formed on a second surface of the wafer, the second set of grooves being perpendicular to the first set of grooves and the wafer is subdivided along the grooves to form semiconductive units from the wafer. McCann does not disclose how the wafer is subdivided.
U.S. Pat. No. 3,972,133 to Nakada et al. discloses a process for producing semiconductor devices from a single wafer. Grooves are formed on upper and lower surfaces of a silicon wafer and the wafer is cut through the upper and lower grooves to form individual semiconductor devices.